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      <h2 id="计算机组成原理-01-计算机系统概述"><a href="#计算机组成原理-01-计算机系统概述" class="headerlink" title="计算机组成原理-01-计算机系统概述"></a>计算机组成原理-01-计算机系统概述</h2><h2 id="1-计算机的四代变化"><a href="#1-计算机的四代变化" class="headerlink" title="1. 计算机的四代变化"></a>1. 计算机的四代变化</h2><p><img src="http://zhuuu-bucket.oss-cn-beijing.aliyuncs.com/img/20210322-105224626.png" alt="mark"></p>
<p><strong>1）摩尔定律。</strong>摩尔定律是由英特尔（Intel）创始人之一戈登·摩尔（Gordon Moore）提出来的。其内容为：当价格不变时，集成电路上可容纳的元器件的数目，约每隔18-24个月便会增加一倍，性能也将提升一倍。换言之，每一美元所能买到的电脑性能，将每隔18-24个月翻一倍以上。这一定律揭示了信息技术进步的速度 。尽管这种趋势已经持续了超过半个世纪，摩尔定律仍应该被认为是观测或推测，而不是一个物理或自然法 。</p>
<p><strong>2）半导体存储器的发展。</strong>1970年仙童半导体公司生产出第一个较大容量的半导体存储器，至今，半导体存储器经历了11代；单芯片1KB、4KB、16KB、64KB、256KB、1MB、4MB、16MB、64MB、256MB、1GB。</p>
<p>3）微处理器的发展。微处理器位数：8-&gt;16-&gt;32-&gt;64，这里的32、64指的是机器字长，是指计算机进行一次整数运算所能处理的二进制数据的位数。</p>
<a id="more"></a>



<h2 id="2-计算机的组成"><a href="#2-计算机的组成" class="headerlink" title="2. 计算机的组成"></a>2. 计算机的组成</h2><p><img src="http://zhuuu-bucket.oss-cn-beijing.aliyuncs.com/img/20210322-105756753.png" alt="mark"></p>
<p><strong>软件分类如下：</strong></p>
<p><img src="http://zhuuu-bucket.oss-cn-beijing.aliyuncs.com/img/20210322-105842514.png" alt="mark"></p>
<p><strong>语言等级</strong></p>
<p><img src="http://zhuuu-bucket.oss-cn-beijing.aliyuncs.com/img/20210322-105934707.png" alt="mark"></p>
<h2 id="3-冯·诺依曼机"><a href="#3-冯·诺依曼机" class="headerlink" title="3. 冯·诺依曼机"></a>3. 冯·诺依曼机</h2><ul>
<li><p>美籍匈牙利科学家冯·诺依曼最先提出“程序存储”的思想，并成功将其运用在计算机的设计之中，根据这一原理制造的计算机被称为冯·诺依曼结构计算机。由于他对现代计算机技术的突出贡献，因此冯·诺依曼又被称为“现代计算机之父”。</p>
<ul>
<li>“程序存储”：指令以代码的形式事先输入到计算机的主存储器中，然后按其在存储器中的首地址执行程序的第一条指令，以后就按该程序的规定顺序执行其他指令，直至程序执行结束。</li>
</ul>
</li>
<li><p><strong>计算机的五大功能部件</strong>：<code>输入设备、输出设备、存储器、运算器、控制器</code></p>
</li>
</ul>
<p><img src="http://zhuuu-bucket.oss-cn-beijing.aliyuncs.com/img/20210322-111632056.png" alt="mark"></p>
<p><img src="http://zhuuu-bucket.oss-cn-beijing.aliyuncs.com/img/20210322-111934913.png" alt="mark"></p>
<h2 id="4-现代计算机的结构"><a href="#4-现代计算机的结构" class="headerlink" title="4. 现代计算机的结构"></a>4. 现代计算机的结构</h2><ul>
<li>在微处理器问世之前，运算器与控制器分离。而且存储器容量小，因此设计成以运算器为中心的结构，其他部件都通过运算器完成信息的传递，如上图所示。</li>
<li>随着微电子技术的进步，同时计算机需要处理的信息也越来越多，大量I/O设备的速度和CPU的速度差距悬殊，因此需要更新换代计算机的组织结构以适应新的需求。计算机发展为了以存储器为中心，使I/O设备尽可能的绕过CPU，直接在I/O设备与存储器之间完成操作，以提高整体效率。其结构如下图所示：</li>
</ul>
<p><img src="http://zhuuu-bucket.oss-cn-beijing.aliyuncs.com/img/20210322-112030679.png" alt="mark"></p>
<h2 id="5-主存储器"><a href="#5-主存储器" class="headerlink" title="5. 主存储器"></a>5. 主存储器</h2><p><img src="http://zhuuu-bucket.oss-cn-beijing.aliyuncs.com/img/20210322-113400653.png" alt="mark"></p>
<ul>
<li>存储体：存放二进制信息</li>
<li>地址寄存器（MAR-Memory Address Register）:存放访存地址，经过地址译码后找到所选的逻辑单元</li>
<li>数据寄存器（MDR-Memory Data Register）:暂存要从存储器中读或写的信息</li>
<li>时序控制逻辑：用于产生存储器操作所需的各种时序信号</li>
<li>地址寄存器（MAR-Memory Address Register）用于寻址，其位数对应着存储单元的个数，如MAR为10位，则有2^10^=1024个存储单元，记为1K。MAR的长度与PC（程序计数器）长度相等。</li>
<li>MDR位数=存储字长，一般为字节(B)的二次幂的整数倍</li>
<li>MAR和MDR虽然是存储器的一部分，但在现代CPU中却是存在于CPU中的；另外高速缓存（Cache）也存在于CPU中<br><img src="http://zhuuu-bucket.oss-cn-beijing.aliyuncs.com/img/20210322-113700559.png" alt="mark"></li>
</ul>
<h2 id="6-运算器"><a href="#6-运算器" class="headerlink" title="6. 运算器"></a>6. 运算器</h2><p><img src="http://zhuuu-bucket.oss-cn-beijing.aliyuncs.com/img/20210322-113919523.png" alt="mark"></p>
<ul>
<li>运算器：ALU 算数逻辑单元是最主要的组成部件，运算器包含若干通用寄存器，用于暂存操作数和中间结果。</li>
</ul>
<h2 id="7-控制器"><a href="#7-控制器" class="headerlink" title="7. 控制器"></a>7. 控制器</h2><p><img src="http://zhuuu-bucket.oss-cn-beijing.aliyuncs.com/img/20210322-114103653.png" alt="mark"></p>
<ul>
<li>控制器是计算机的<code>指挥中心</code>，它指挥着各部件自动协调地进行工作</li>
</ul>
<h2 id="8-工作过程小结"><a href="#8-工作过程小结" class="headerlink" title="8. 工作过程小结"></a>8. 工作过程小结</h2><p><img src="http://zhuuu-bucket.oss-cn-beijing.aliyuncs.com/img/20210322-115017372.png" alt="mark"></p>
<ul>
<li><p><code>总线</code>中有<code>地址、数据、控制</code>三组信号线</p>
</li>
<li><p><code>CPU与主存</code>之间通过一组<code>总线</code>相连</p>
</li>
<li><p><code>MAR</code>中的地址信息会直接送到<code>地址线</code>上，用于指向<code>读/写</code>操作的<code>主存存储单元</code></p>
</li>
<li><p><code>控制线</code>中有<code>读/写</code>信号线，指出数据是从CPU<code>写入</code>主存还是从主存<code>读出</code>到<code>CPU</code></p>
</li>
<li><p>根据<code>读</code>操作还是<code>写</code>操作来控制将<code>MDR中的数据</code>是直接<code>送到数据线上</code>还是将数据线上的数据<code>接收到MDR</code>中</p>
</li>
</ul>
<h2 id="9-计算机的工作过程"><a href="#9-计算机的工作过程" class="headerlink" title="9. 计算机的工作过程"></a>9. 计算机的工作过程</h2><p><img src="http://zhuuu-bucket.oss-cn-beijing.aliyuncs.com/img/20210322-151055001.png" alt="mark"></p>
<ul>
<li>这里以UNIX系统中的GCC编译器程序为例，将C语言源程序转换为<code>可执行文件（以二进制磁盘文件形式存储）</code></li>
</ul>
<p><img src="http://zhuuu-bucket.oss-cn-beijing.aliyuncs.com/img/20210322-151153003.png" alt="mark"></p>
<p> 例题：以取数指令（即将指令地址码指示的存储单元中的操作数取出后送至运算器的累加器(ACC)中）为例进行说明。其信息流程如下：</p>
<blockquote>
<p>累加器ACC：二进制8位寄存器，存放操作数或运算结果。<br>M : 主存储器</p>
</blockquote>
<ol>
<li><strong>取指令</strong>  ：PC-&gt;MAR-&gt;M-&gt;MDR-&gt;IR</li>
</ol>
<ul>
<li><code>根据PC取指令到IR</code>。将PC的内容送MAR，MAR中的内容直接送地址线，同时控制器将读/写信号送读/写信号线，主存根据地址线上的地址和读信号，从指定存储单元读出指令，送到数据线上，MDR从数据线接受指令信息，并传送到IR中。</li>
</ul>
<ol start="2">
<li><strong>分析指令</strong> ： OP(IR)-&gt;CU</li>
</ol>
<ul>
<li><code>指令译码器解释操作码OP(IR)并送出控制信号</code>。指令寄存器（IR）将操作码OP(IR)送至指令译码器（ID）进行解释翻译，将翻译的信息送至操作控制器（OC），OC生成相应的控制信号，送到不同的执行部件。</li>
</ul>
<ol start="3">
<li><strong>执行指令</strong> ： Ad(IR)-&gt;MAR-&gt;M-&gt;MDR-&gt;ACC</li>
</ol>
<ul>
<li><code>取数操作</code>。将IR中的指令地址码送MAR，MAR将内容送至地址线，同时控制器将读/写信号送读/写线，从主存指定单元读出操作数，并通过数据线送至MDR，再传送到ACC中。</li>
</ul>
<ol start="4">
<li><strong>每取完一条指令，(PC)+1-&gt;PC，取下一条指令的地址。</strong></li>
</ol>
<h2 id="10-计算机的层次结构"><a href="#10-计算机的层次结构" class="headerlink" title="10. 计算机的层次结构"></a>10. 计算机的层次结构</h2><p><img src="http://zhuuu-bucket.oss-cn-beijing.aliyuncs.com/img/20210322-150749119.png" alt="mark"></p>
<h2 id="11-计算机的主要性能指标"><a href="#11-计算机的主要性能指标" class="headerlink" title="11. 计算机的主要性能指标"></a>11. 计算机的主要性能指标</h2><p><img src="http://zhuuu-bucket.oss-cn-beijing.aliyuncs.com/img/20210322-152255067.png" alt="mark"></p>
<p><strong>性能指标：</strong></p>
<p><img src="http://zhuuu-bucket.oss-cn-beijing.aliyuncs.com/img/20210322-152429772.png" alt="mark"></p>

      
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